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Note: Links lead to the DBLP on the Web. Akira Matsumoto Atsuyuki Morishima , Hiroyuki Kitagawa , Akira Matsumoto: A Machine Learning Approach to Rapid Development of XML Mapping Queries. ICDE 2004 : 276-287 Akira Matsumoto: Locally Parallel Cache Design Based on KL1 Memory Access Characteristics. New Generation Comput. 9 (2): 149-170 (1991) Kenji Nishida , Yasunori Kimura , Akira Matsumoto, Atsuhiro Goto : Evaluation of MRB Garbage Collection on Parallel Logic Programming Architectures. ICLP 1990 : 83-95 Atsuhiro Goto , Akira Matsumoto, Evan Tick : Design and Performance of a Coherent Cache for Parallel Logic Programming Architectures. ISCA 1989 : 25-33 Atsuhiro Goto , Masatoshi Sato , Katsuto Nakajima , Kazuo Taki , Akira Matsumoto: Overview of the Parallel Inference Machine Architecture (PIM). FGCS 1988 : 208-229 Masatoshi Sato , Hajime Shimizu , Akira Matsumoto, Kazuaki Rokusawa , Atsuhiro Goto : KL1 Execution Model for PIM Cluster with Shared Memory. ICLP 1987 : 338-355 Rikio Onai , Hajime Shimizu , Kanae Masuda , Akira Matsumoto, Moritoshi Aso : Architecture and Evaluation of a Reduction-Based Parallel Inference Machine: PIM-R. LP 1985 : 1-12 Rikio Onai , Moritoshi Aso , Hajime Shimizu , Kanae Masuda , Akira Matsumoto: Architecture of a Reduction-Based Parallel Inference Machine: PIM-R. New Generation Comput. 3 (2): 197-228 (1985) 1 [ 1 ] [ 2 ] 2 [ 3 ] [ 4 ] [ 5 ] [ 6 ] 3 [ 6 ] 4 [ 8 ] 5 [ 1 ] [ 2 ] 6 [ 8 ] 7 [ 4 ] 8 [ 6 ] 9 [ 1 ] [ 2 ] 10 [ 3 ] 11 [ 3 ] [ 4 ] 12 [ 1 ] [ 2 ] [ 3 ] 13 [ 4 ] 14 [ 5 ]  ©2005 Association for Computing Machinery |
